A new research paper released by NVIDIA engineers describes ways generative AI can assist one of the most complex engineering efforts: designing semiconductors.
The paper showcases how companies in highly specialized fields can train large language models (LLMs) on their internal data to build assistants that increase productivity.
Semiconductor designing is one of the most challenging endeavors, involving the meticulous construction of chips built with tens of billions of transistors connected on streets 10,000 times thinner than a human hair.
To create such a digital metropolis, several engineering teams work together for up to two years. Some teams define the chip’s overall architecture, some craft and place various tiny circuits, and others test their work. Each task requires specialized techniques, software tools, and computer languages. Researchers believe over time, large language models will help all the processes across the board.
NVIDIA engineers created a custom LLM called ChipNeMo, trained on the company’s internal data to generate and optimize software and assist human designers in building semiconductors.
The long-term goal is to apply generative AI to each stage of chip design, potentially reaping significant gains in overall productivity. The possible use cases explored by the team include a chatbot, a code generator, and an analysis tool.
The analysis tool that automates the time-consuming tasks of maintaining updated descriptions of known bugs has been the most well-received so far. A prototype chatbot that helped many engineers quickly find technical documents in early tests and a code generator that creates snippets of about 10-20 lines of software in two specialized languages chip designers use are also in development.
The team’s work focuses on gathering its design data and using it to create a specialized generative AI model, a process portable to any industry. The team used NVIDIA NeMo, a framework for building, customizing, and deploying generative AI models, to refine the model.
The chosen NeMo model has 43 billion parameters and was trained on more than a trillion tokens, demonstrating its capability to understand patterns.
To improve the performance of the model, the team conducted two rounds of training. The first round used about 24 billion tokens of internal design data, and the second round used a combination of about 130,000 examples of design and conversation.
This is one of the recent examples of how generative AI can be applied to the semiconductor industry, as more research and proofs of concept are emerging from the lab. It highlights how custom ChipNeMo models with as few as 13 billion parameters match or exceed the performance of even much larger general-purpose LLMs on chip-design tasks.
The semiconductor industry is indeed in its early stages of exploring the potential of generative AI. The research conducted in this field can provide valuable insights that can help enterprises develop their custom LLMs. NVIDIA says those interested in building their own LLMs can use the NeMo framework, which is readily available on GitHub and the NVIDIA NGC catalog.
