Typically, developing any type of hardware – including chips, the tiny electronic components that act as the brains of electronic devices – starts with describing what the hardware should do in normal language. Specially trained hardware engineers then translate that description into appropriate Hardware Description Languages (HDLs), such as Verilog, to create the actual circuit elements that allow the hardware to perform its tasks.
Automating this translation process could potentially minimize human errors and improve the overall efficiency of the engineering process. Recently, artificial intelligence (AI) has demonstrated capabilities for machine-based end-to-end design translations. Commercially available instruction-tuned Large Language Models (LLMs), such as OpenAI’s ChatGPT and Google’s Bard, claim to be able to produce code in a variety of programming languages. However, studies examining them for hardware are still lacking.
Now, a research team at NYU Tandon School of Engineering has fabricated a microprocessing chip using plain English “conversations” with an AI model. The first-of-its-king achievement could lead to faster chip development and allow individuals without specialized technical skills to design chips.
To design a new type of microprocessor architecture, two hardware engineers “talked” in standard English with ChatGPT-4 – a Large Language Model (LLM) built to understand and generate human-like text type. They then sent the designs to manufacture.
The LLM was able to produce workable Verilog through back-and-forth dialogue. The subsequent chip manufacture included the benchmarks and the processor, using a process called tapeout, in a Skywater 130nm shuttle, a specific kind of semiconductor manufacturing service, access to which was provided via Tiny Tapeout.
“This study resulted in what we believe is the first fully AI-generated HDL sent for fabrication into a physical chip,” said NYU Tandon’s Hammond Pearce, a member of the research team. “Some AI models, like OpenAI’s ChatGPT and Google’s Bard, can generate software code in different programming languages, but their application in hardware design has not been extensively studied yet. This research shows AI can benefit hardware fabrication too, especially when it’s used conversationally, where you can have a kind of back-and-forth to perfect the designs.”
In their study, the research team used LLMs to work on eight hardware design examples, specifically by generating Verilog code for functional and verification purposes, before focusing on chip fabrication for a deep-dive case study.
Researchers say if implemented in real-world settings, using LLM conversations in chip fabrication could reduce human error in the HDL translation process, contribute to productivity gains, shorten design time and time to market, and allow for more creative designs.
It’s interesting to note that the process developed could also potentially eliminate the need for HDL fluency among chip designers, which is a relatively rare skill.
Further testing is needed to identify and address any potential security concerns that may arise when utilizing AI in chip design. It’s essential to ensure that safety and security are top priorities when implementing automated tools in hardware engineering.
- Jason Blocklove, Siddharth Garg, Ramesh Karri, Hammond Pearce. Chip-Chat: Challenges and Opportunities in Conversational Hardware Design. arXiv, 2023; DOI: 10.48550/arxiv.2305.13243