IBM and Samsung Electronics have unveiled new semiconductor design that promises to revolutionize the performance of electronic devices, including cell phones. The design utilizes a new vertical transistor architecture that demonstrates a path to scaling beyond nanosheet and has the potential to reduce energy usage by 85% compared to a scaled fin field-effect transistor (finFET).
The global semiconductor shortage has highlighted the critical role of investment in chip research and development and the importance of chips in everything from computing, to appliances, to communication devices, transportation systems, and critical infrastructure. This collaborative approach to innovation makes the Albany Nanotech Complex a world-leading ecosystem for semiconductor research and creates a strong innovation pipeline, helping to address manufacturing demands and accelerate the growth of the global chip industry.
The new vertical transistor breakthrough could help the semiconductor industry continue its relentless journey to deliver significant improvements. For example, it could pave the way for smartphones that run for weeks on a charge and enable semiconductor device scaling to continue beyond nanosheet, among some other interesting possibilities.
“Today’s technology announcement is about challenging convention and rethinking how we continue to advance society and deliver new innovations that improve life, business and reduce our environmental impact,” Dr. Mukesh Khare, Vice President, Hybrid Cloud, and Systems, IBM Research. “Given the constraints, the industry is currently facing along multiple fronts, IBM and Samsung are demonstrating our commitment to joint innovation in semiconductor design and a shared pursuit of what we call ‘hard tech.'”
Transistors have historically been built to lie flat upon the surface of a semiconductor, with the electric current flowing laterally or side-to-side through them. With the new Vertical Transport Field Effect Transistors (VTFET), IBM and Samsung have successfully implemented transistors that are built perpendicular to the surface of the chip with a vertical, or up-and-down, current flow.
According to IBM, the VTFET process addresses many barriers to performance and limitations to extend Moore’s Law as chip designers attempt to pack more transistors into a fixed space. It also influences the contact points for the transistors to boost the current flow and save on energy. Overall, the company says the new design aims to deliver a two times improvement in performance or an 85% reduction in energy use as compared to scaled finFET alternatives.
Back in May, IBM announced its new 2-nanometer (nm) microprocessor, the smallest and most powerful ever developed that allowed the 2 nm chip to fit up to 50 billion transistors on a chip the size of a fingernail. This greatly boosted the performance and efficiency to offer a 75% reduction in energy use compared to industry-standard chips with 7 nm transistors. VTFET innovation focuses on a whole new dimension, which offers a pathway to the continuation of Moore’s Law.
IBM imagines VTFET architecture playing a game-changing role in a number of areas. These chips could allow the Internet of Things (IoT) and edge devices such as ocean buoys, autonomous vehicles, and spacecraft to run on less energy. It could have similar effects on energy-intensive computing processes such as crypto-mining operations and data encryption while also lowering their carbon footprints.